Time-Predictable Acceleration of Deep Neural Networks on FPGA SoC Platforms

Type of publication
Publication in Conference Proceedings/Workshop
Authors

F. Restuccia and A. Biondi,

Conference / Journal
IEEE Real-Time Systems Symposium (RTSS)
Publisher
IEEE
Year of publication
2021
Place of publication
Dortmund
Citation

F. Restuccia and A. Biondi, "Time-Predictable Acceleration of Deep Neural Networks on FPGA SoC Platforms," 2021 IEEE Real-Time Systems Symposium (RTSS), Dortmund, DE, 2021, pp. 441-454, doi: 10.1109/RTSS52674.2021.00047.

Abstract

This work focuses on the time-predictable execution of Deep Neural Networks (DNNs) accelerated on FPGA System-on-Chips (SoCs). The modern DPU accelerator by Xilinx is considered. An extensive profiling campaign targeting the Zynq Ultrascale+ platform has been performed to study the execution behavior of the DPU when accelerating a set of state-of-the-art DNNs for Advanced Driver Assistance Systems (ADAS). Based on the profiling, an execution model is proposed and then used to derive a response-time analysis. A custom FPGA module named DICTAT is also proposed to improve the predictability of the acceleration of DNNs and tighten the analytical bounds. A rich set of experimental results based on both analytical bounds and measurements from the target platform is finally presented to assess the effectiveness and the performance of the proposed approach on ADAS applications.

DOI
10.1109/RTSS52674.2021.00047
ISSN number
978-1-6654-2802-6