Events

The AMPERE consortium is presenting a paper titled 'Learning based Memory Interference Prediction for Co-running Applications on Multi-Cores' on 31 August 2021 at the 3rd edition of MLCAD workshop.

The AMPERE consortium is presenting its first video in the RISC-V digital booth at ISC High Performance 2021 Digital.

The AMPERE consortium participates in a panel discussion titled: 'OpenMP for High Integrity systems: Moving responsibility from users to vendors' on 16 November 2020 at the ACM SIGPLAN conference on Systems, Programming, Languages, and Applications: Software for Humanity (SPLASH 2020).

The AMPERE consortium is scheduled to make a presentation on 10 September 2020 online at HiPEAC workshop 'SoS integration with CPS.'

The AMPERE consortium is scheduled to make a presentation on 26 August 2020 online at the Euro-Par 2020 in the 'Support Tools and Environments (A)' session.

The AMPERE consortium organizes an online face-to-face meeting (F2F) that would have taken place at BSC in Barcelona, Spain from July 14 to July 17, 2020, originally. However, due to concerns about the Covid-19 outbreak, the workshop has been fully conducted in a virtual form via a specialized platform.

The AMPERE consortium was scheduled to present a presentation in July 2020 in Modena, Italy at ECRTS 2020. However, the event is taking place in digital form due to concerns about the Covid-19 outbreak.

The AMPERE consortium was scheduled to present a paper in June 2020 in Frankfurt, Germany at ISC High Performance 2020. However, the event is taking place in digital form due to concerns about the Covid-19 outbreak.